Amplifiers with precise integer gains are required in many analog-to-digital converters and digital-to-analog converters. While relatively precise gains can be obtained with switched-capacitor gain stages, their accuracy is limited to about 1 part in 1000 due to mismatches in the capacitor ratios. Therefore, to achieve higher accuracy, the capacitor ratio must be trimmed. This is referred to herein as calibrating a switched capacitor gain stage.
As shown in FIG. 1, a capacitor C typically is trimmed by adding an array of smaller trim capacitors C.sub.T1 -C.sub.TN in parallel with the capacitor C to be trimmed (which trim capacitors are shown also as a variable capacitor). The trim capacitors are connected in parallel with the capacitor C by switches S.sub.1 -S.sub.N. The switches can be implemented either as fusible links or as field effect transistors.
Circuits with fusible links are trimmed during manufacturing and can only be used once. This process is both expensive and does not correct for possible component drifts due to time and temperature.
Circuits which use field effect transistor switches, allow the capacitor to be trimmed after manufacturing, throughout the life of the integrated circuit. This leads to a lower manufacturing cost and to better long-term accuracy.
FIG. 2 illustrates a switched capacitor gain stage which is to be trimmed, using the notation of the variable capacitor instead of showing discrete trim capacitors. An operational amplifier 1 has its non-inverting input connected to ground, and its output connected via a switch S3 to its inverting input. Its inverting input is also connected via a capacitor C.sub.b and a switch S.sub.5b to a voltage reference V.sub.r. The junction of switch S.sub.5b and the capacitor C.sub.b is also connected via switch S.sub.5a to ground, and via switch S.sub.4 to the output of the operational amplifier.
The inverting input of the operational amplifier is connected via capacitors C.sub.a1 -C.sub.an (each of which has the nominal value of capacitor C.sub.b), to input voltage Vi (which has the value V.sub.r), via respective switches S.sub.1a -S.sub.na. The junctions of capacitors C.sub.a1 --C.sub.aN and switches S.sub.1a -S.sub.4N are connected via respective switches S.sub.1b -S.sub.nb to ground.
Variable trim capacitors C.sub.T are connected in parallel with respective capacitors C.sub.a1 -C.sub.aN.
This circuit can be used to provide integer gains. The gain depends on how many of the input capacitors (C.sub.a1, C.sub.a2, . . .) are connected to V.sub.i during the sampling phase. To obtain accurate gains, each of the input capacitors must equal the feedback capacitor (C.sub.b). Since the method requires that the capacitors to be trimmed be equal, each of the input capacitors must be trimmed individually.
To trim capacitor C.sub.a1, the inputs to all the other input capacitors are connected to ground. Capacitor C.sub.a1 is then connected to a reference voltage, V.sub.i =V.sub.r, through switch S.sub.1a while C.sub.b is connected to ground through S.sub.5a. The operational amplifier's output is shorted to its inverting input with switch S.sub.3. Switch S.sub.4 is permanently opened in calibration mode. This is the sample/reset phase.
Then switches S.sub.1a, S.sub.5a, and S.sub.3 are opened. Capacitor C.sub.a1 is then connected to ground through switch S.sub.1b while capacitor C.sub.b is connected to voltage V.sub.r through switch S.sub.5b. This is the amplify/compare phase. During this phase the operational amplifier's output voltage V.sub.o is compared to V.sub.r. If V.sub.o is greater than V.sub.r, then capacitor C.sub.a1 is too big. If V.sub.o is less than V.sub.r then capacitor C.sub.a1 is too small. Capacitor C.sub.a1 is then adjusted and the sample/reset and amplify/compare cycle is repeated, until the best trim setting is found.
The above method suffers from two main limitations. Firstly, for gains greater than one, multiple input (unit) capacitors must be used and both a separate trim array and trim routine must be used for each input capacitor. Hence, for a gain of two, two trim arrays and two trim routines are required. Secondly, the input capacitor cannot be trimmed while monitoring the operational amplifier's output. For each step change in the capacitor the entire cycle (sample/reset and amplify/compare) must be repeated. The combination of these two requirements increases the required die area and trim line leading to a less than optimal solution.